Implementation of Digital Filters for High Throughput Applications on Fpga

The digital filter implementation in FPGA,utilising the dedicated hardware resources can effectively achieve ASIC-like performance while reducing development time cost and risks. Advantage of FPGA approach to digital filter implementation including sampling rates than are availablefrom traditional DSP chips. In this paper a low pass,band pass and highpass FIR filter is implemented on FPGA.This approach gives a better performance than the common filter structures in terms of speed of operation,cost and power consumption in real time.In this technique, codes for direct fixed point FIR filter have been realized. Modules such as multiplier, adder, ram and two’s complement were used. For an N order filter the filter the number of registers and adders required is N and the number of multipliers required is N+1.For high speed and high throughput applications,MAC is used and that consumes less power.